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Failure Analysis Of Operational Amplifier

DUAL MATCHED HIGH PERFORMANCE OP-AMP
TO-99 PACKAGE
OP-14


One (1) device was received and reportedly failed during system application.

Examination

External visual examination was performed and the device was found to have extensive package damage. This damage appears to be the result of the extraction technique used when removing the device from the board.


Overall optical view of the device as received.

 

Overall optical view of the device as received.

 

Radiographic Examination was performed to determine if any anomalous conditions were evident that would result in the observed failure mode. No anomalies were detected (other than the crushed package).

 

Overall radiographic (top) view showing no defects.

 

Overall radiographic (side) view showing no defects other than the crushed package lid.

 

Internal Visual Examination revealed a small defect at the V+ metal line directly over the D1 diode at the thinnest/weakest oxide location. This defect was in the form of metal, glassivation, oxide and silicon reflow that was induced by intense localized heat. The original failure, due to the location of the failure site on the metal line and the location of the failure in the circuit, is believed to be the result of Electro Static Discharge (ESD) i.e. a high voltage spike of short duration. Additional heating and reflow is the result of application within the circuit after failure, and verification testing. No other defects were observed. C1 is a capacitor within the circuit.

 

Overall optical view of the semiconductor chip showing the pin out and failure site (25X).

 

Detailed optical view showing the D1 diode directly under the failure site (thinner oxide at this location) (100X).

 

Detailed optical view showing the D1 diode directly under the failure site (thinner oxide at this location) (200X).

 

Detailed optical view showing the D1 diode directly under the failure site (thinner oxide at this location) (400X).

 

Scanning electron microscope (SEM) micrograph of the semiconductor chip (58X).

 

SEM micrograph showing the failure site (192X).

 

SEM micrograph showing the failure site (4,240X).

 

SEM micrograph showing the failure site (8,500X).

 

 

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